Title | ||
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High-Efficiency Charge Pumps with No Reversion Loss by Utilizing Gate Voltage Boosting Technique |
Abstract | ||
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This paper presents the high-efficiency charge pumps (CPs) that eliminate the reversion loss by using gate voltage boosting technique. First, a 6-phase bulk-CMOS CP with enhanced gate voltage is designed to reduce the reversion loss. Second, an all-NMOS CP is also demonstrated to improve the current driving capability and to break the limitation of the substrate diode breakdown voltage. The chip is designed with a 0.18-μm standard CMOS technology. As a result, the single-stage bulk-CMOS CP achieves a maximum output voltage and peak power efficiency of 6.595V and 84.2%, respectively. Moreover, the all-NMOS CP achieves ∼1.2× more output voltage than the bulk-CMOS CP at 1.5mA load current. |
Year | DOI | Venue |
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2020 | 10.1109/ISCAS45731.2020.9180417 | 2020 IEEE International Symposium on Circuits and Systems (ISCAS) |
Keywords | DocType | ISBN |
Capacitors,Clocks,Logic gates,Charge pumps,MOSFET,Delays | Conference | 978-1-7281-3320-1 |
Citations | PageRank | References |
1 | 0.35 | 0 |
Authors | ||
3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Yixin Zhou | 1 | 1 | 0.35 |
Zhigong Wang | 2 | 29 | 21.30 |
Keping Wang | 3 | 18 | 3.77 |