Name
Abstract | ||
|---|---|---|
Most current real-time parallel applications can be modeled as a directed acyclic graph (DAG) task. Existing worst-case response time (WCRT) bounds (e.g., Graham's bound) derived for DAGs may be very pessimistic. No one precisely knows the gap between the WCRT bound and the actual WCRT. In this paper, we aim to derive the exact WCRT of a DAG task under the list scheduling upon multi-core platforms. We encode the WCRT analysis problem into a satisfaction modular theoretical (SMT) formulation based on insights into the list scheduling algorithm, and prove that our SMT program can solve the WCRT precisely, providing an accurate baseline to measure the tightness of the existing WCRT bounds. Experiments show that our method significantly improves the tightness of the WCRT bound, and is practically quite efficient, e.g., it can analyze DAGs with more than 40 vertices in a few seconds. |
Year | DOI | Venue |
|---|---|---|
2020 | 10.1109/DAC18072.2020.9218744 | 2020 57th ACM/IEEE Design Automation Conference (DAC) |
DocType | ISSN | ISBN |
Conference | 0738-100X | 978-1-7281-1085-1 |
Citations | PageRank | References |
1 | 0.35 | 0 |
Authors | ||
7 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jinghao Sun | 1 | 13 | 1.89 |
| Feng Li | 2 | 4 | 1.72 |
| Nan Guan | 3 | 95 | 21.53 |
| Wentao Zhu | 4 | 250 | 19.35 |
| Minjie Xiang | 5 | 1 | 0.35 |
| Zhishan Guo | 6 | 329 | 34.04 |
| Wang Yi | 7 | 4232 | 332.05 |