Abstract | ||
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We propose SANSCrypt, a novel sequential logic encryption scheme to protect integrated circuits against reverse engineering. Previous sequential encryption methods focus on modifying the circuit state machine such that the correct functionality can be accessed by applying the correct key sequence only once. Considering the risk associated with one-time authentication, SANSCrypt adopts a new temporal dimension to logic encryption, by requiring the user to sporadically perform multiple authentications according to a protocol based on pseudorandom number generation. Analysis and validation results on a set of benchmark circuits show that SANSCrypt offers a substantial output corruptibility if the key sequences are applied incorrectly. Moreover, it exhibits an exponential resilience to existing attacks, including SAT-based attacks, while maintaining a reasonably low overhead. |
Year | DOI | Venue |
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2020 | 10.1109/VLSI-SOC46417.2020.9344079 | 2020 IFIP/IEEE 28th International Conference on Very Large Scale Integration (VLSI-SOC) |
Keywords | DocType | ISSN |
integrated circuit protection,reverse engineering,circuit state machine,one-time authentication,SANSCrypt,benchmark circuits,key sequences,SAT-based attacks,sporadic-authentication-based sequential logic encryption scheme,temporal dimension,pseudorandom number generation,authentication protocol | Conference | 2324-8432 |
ISBN | Citations | PageRank |
978-1-7281-5410-7 | 0 | 0.34 |
References | Authors | |
0 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Yinghua Hu | 1 | 0 | 0.68 |
Kaixin Yang | 2 | 0 | 1.01 |
Shahin Nazarian | 3 | 327 | 38.55 |
Pierluigi Nuzzo | 4 | 305 | 33.35 |