Name
Abstract | ||
|---|---|---|
Field-programmable gate array (FPGA)-based ternary content-addressable memories (TCAMs) are constantly evolving in terms of hardware, power consumption, and speed. One disadvantage of these emulated TCAMs is its poor update-latency. Traditional FPGA-based TCAMs have an update-latency of ${N}$ clock cycles compared to the lookup-latency of one clock cycle, where ${N}$ is the depth of TCAM. Late... |
Year | DOI | Venue |
|---|---|---|
2021 | 10.1109/LES.2020.2999471 | IEEE Embedded Systems Letters |
Keywords | DocType | Volume |
Clocks,Field programmable gate arrays,Hardware,Pins,Logic gates,Registers,Acceleration | Journal | 13 |
Issue | ISSN | Citations |
2 | 1943-0663 | 0 |
PageRank | References | Authors |
0.34 | 0 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Muhammad-Naeem Irfan | 1 | 68 | 29.98 |
| Zahid Ullah | 2 | 96 | 15.56 |
| Abdurrashid I. Sanka | 3 | 0 | 0.34 |
| Ray C. C. Cheung | 4 | 625 | 72.26 |