Title
An 8Ω, 1.4W, 0.0024% THD+N Class-D Audio Amplifier with Bridge-Tied Load Half-Side Switching Mode Achieving Low Standby Quiescent Current of 660μA
Abstract
In this paper, a Class-D audio amplifier (CDA) with bridge-tied load half-side switching (BTLHS) mode is presented. The BTLHS mode through a digital pulse width subtracter (DPWS) enables a low quiescent current (I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Q</sub> ) by suspending the output switching in idle condition while maintaining high linearity with seamless zero-crossings and mode change. The CDA achieves 0.0024% THD+N, I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Q</sub> of 0.66mA, and 95% peak efficiency on an 8Ω-speaker. The chip was fabricated in a 0.18-μm CMOS process, and it occupies 0.83mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .
Year
DOI
Venue
2020
10.1109/VLSICircuits18222.2020.9162781
2020 IEEE Symposium on VLSI Circuits
Keywords
DocType
ISSN
Class-D audio amplifier,CDA,BTLHS mode,digital pulse width subtracter,CMOS process,bridge-tied load half-side switching mode,standby quiescent current,power 1.4 W,current 0.66 mA
Conference
2158-5601
ISBN
Citations 
PageRank 
978-1-7281-9943-6
0
0.34
References 
Authors
0
5
Name
Order
Citations
PageRank
Ji-Hun Lee153.92
Gyeong-Gu Kang222.83
Min-Woo Ko301.35
Gyu-Hyeong Cho440176.39
Hyun-Sik Kim54013.29