Paper Info
Title
Persist Level Parallelism: Streamlining Integrity Tree Updates for Secure Persistent Memory
Abstract
Emerging non-volatile main memory (NVMM) is rapidly being integrated into computer systems. However, NVMM is vulnerable to potential data remanence and replay attacks. Memory encryption and integrity verification have been introduced to protect against such data integrity attacks. However, they are not compatible with a growing use of NVMM for providing crash recoverable persistent memory. Recent works on secure NVMM pointed out the need for data and its metadata, including the counter, the message authentication code (MAC), and the Bonsai Merkle Tree (BMT) to be persisted atomically. However, memory persistency models have been overlooked for secure NVMM, which is essential for crash recoverability.In this work, we analyze the invariants that need to be ensured in order to support crash recovery for secure NVMM. We highlight that by not adhering to these invariants, prior research has substantially under-estimated the cost of BMT persistence. We propose several optimization techniques to reduce the overhead of atomically persisting updates to BMTs. The optimizations proposed explore the use of pipelining, out-of-order updates, and update coalescing while conforming to strict or epoch persistency models, respectively. We evaluate our work and show that our proposed optimizations significantly reduce the performance overhead of secure crash-recoverable NVMM from 720% to just 20%.
Year
DOI
Venue
2020
10.1109/MICRO50266.2020.00015
2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)
Keywords
DocType
ISBN
persistency,security,integrity tree update,persist-level parallelism
Conference
978-1-7281-7384-9
Citations 
PageRank 
References 
4
0.39
27
Authors
4
Name
Order
Citations
PageRank
Alexander Freij140.39
Shougang Yuan271.79
Huiyang Zhou399463.26
Yan Solihin42057111.56