Paper Info
Title
Variable Quantization For Memory-Efficient Successive Cancellation Decoding Of Polar Codes - A Heuristic Approach
Abstract
This paper presents an algorithm to reduce the hardware complexity of the successive-cancellation decoder for polar codes. It has already been discussed in the literature that allocating 6 bits to all log-likelihood ratios instead of using floating point values, can keep performance degradation within 0.1 dB at frame-error rate of 10(boolean AND-3). It has been shown in the paper that if we allocate different bits to different set of log-likelihood ratios rather than assigning the same number of bits to all log-likelihood ratios, the performance degradation is within 0.4 dB at frame-error rate of 10(boolean AND-3). The results show that the proposed variable bit assignment strategy can save the processing elements in the architecture proposed by Arikan and it was observed that the bit width of N/2-1 processing elements out of total N-1 processing elements can be reduced up to 4 bits for a block length of N. In summary, this work has established a trade-off between the number of six bit processing elements and frame-error rate performance of the successive-cancellation decoder.
Year
DOI
Venue
2020
10.1109/PIMRC48278.2020.9217289
2020 IEEE 31ST ANNUAL INTERNATIONAL SYMPOSIUM ON PERSONAL, INDOOR AND MOBILE RADIO COMMUNICATIONS (IEEE PIMRC)
Keywords
DocType
ISSN
Polar codes, successive-cancellation, hardware complexity, frame-error, memory efficient
Conference
2166-9570
Citations 
PageRank 
References 
0
0.34
0
Authors
4
Name
Order
Citations
PageRank
Muhammad Farooq13110.82
Humera Hameed200.68
Muhammad Usman331677.54
Ubaid U. Fayyaz400.34