Name
Abstract | ||
|---|---|---|
Compute-in-memory (CIM) is a promising approach that exploits the analog computation inside the memory array to speed up the vector-matrix multiplication (VMM) for deep neural network (DNN) inference. SRAM has been demonstrated as a mature candidate for CIM architecture due to its availability in advanced technology node. However, as the weights of the DNN model are stationary in the memory cells, it causes potential threats and vulnerabilities for inference engine such as model leaking. This work aims at developing a lightweight yet effective countermeasure to protect the DNN model in CIM architecture. We modify the 6-transistor SRAM bit cell with dual wordlines to implement XOR cipher without sacrificing the parallel computation's efficiency. The evaluations at 28 nm show that XOR-CIM could provide enhanced security and achieve 1.4× energy efficiency improvement and no throughput loss, with only 2.5% area overhead compared to the normal-CIM design without encryption. |
Year | DOI | Venue |
|---|---|---|
2020 | 10.1145/3400302.3415678 | 2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD) |
Keywords | DocType | ISSN |
Deep neural network,machine learning security,compute-in-memory,XOR encryption,SRAM | Conference | 1933-7760 |
Citations | PageRank | References |
1 | 0.37 | 11 |
Authors | ||
5 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Shanshi Huang | 1 | 15 | 6.75 |
| Hongwu Jiang | 2 | 16 | 6.77 |
| Xiaochen Peng | 3 | 61 | 12.17 |
| Wantong Li | 4 | 7 | 3.85 |
| Shimeng Yu | 5 | 490 | 56.22 |