Title
Improvements on the Design of the Low Saturation Onset Transistor
Abstract
The LSOT (low saturation onset transistor) is a four-transistor network that emulates a MOS device with much lower saturation onset voltage by compensating the reverse saturation component of the drain current through its main transistor. Due to current overcompensation in the structure, the DC output characteristic of the equivalent device may present an undesirable hump. This work presents a methodology to properly size the LSOT leading to a smoother characteristic. Moreover, the addition of a simple switch to automatically cut-off an auxiliary branch of the LSOT structure is also proposed, to allow the use of shorter devices without augmenting overall power.
Year
DOI
Venue
2020
10.1109/ICECS49266.2020.9294977
2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
Keywords
DocType
ISBN
MOSFET saturation,saturation onset voltage,CMOS design methodology
Conference
978-1-7281-6045-0
Citations 
PageRank 
References 
0
0.34
1
Authors
4