Name
Title | ||
|---|---|---|
Fast Bring-Up of an AI SoC through IEEE 1687 Integrating Embedded TAPs and IEEE 1500 Interfaces |
Abstract | ||
|---|---|---|
Complex application specific SoC are being developed for hardware support artificial intelligence (AI) applications. Such a complex SoCs are integrating a large number of on-chip and off-chip memories, numerous cores and interfaces including in our case a hierarchy of embedded TAPs, as well as security measures and Design-For-Test (DFT) structures. In this case-study paper, we demonstrate using IEEE 1687-2014 (IJTAG) to integrate all these different components into a single, unifying methodology. From this, we derive the benefits of workflow efficiency and fast silicon bring-up. For example, we can report that silicon bring-up of the DFT of the entire SoC was completed in about 4 days, and other bring-up aspects of the Soc were also completed in very little time. |
Year | DOI | Venue |
|---|---|---|
2020 | 10.1109/ITC44778.2020.9325251 | 2020 IEEE International Test Conference (ITC) |
Keywords | DocType | ISSN |
IEEE 1687,IJTAG,embedded TAP,AI Chip | Conference | 1089-3539 |
ISBN | Citations | PageRank |
978-1-7281-9114-0 | 0 | 0.34 |
References | Authors | |
0 | 10 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Haiying Ma | 1 | 0 | 0.68 |
| Ligang Lu | 2 | 0 | 0.34 |
| Haitao Qian | 3 | 0 | 0.34 |
| Jing Han | 4 | 0 | 0.68 |
| Xin Wen | 5 | 0 | 0.34 |
| Fanjin Meng | 6 | 0 | 0.34 |
| Rahul Singhal | 7 | 0 | 1.35 |
| Martin Keim | 8 | 0 | 0.34 |
| Yu Huang | 9 | 5 | 2.59 |
| Wu Yang | 10 | 2 | 1.73 |