Title
A High-Resolution Hybrid Digital Pulse Width Modulator With Dual-Edge-Triggered Flip-Flops And Hardware Compensation
Abstract
In this paper, a hybrid architecture of digital pulse width modulator (DPWM) which applies a counter, a phase-shifted circuit, and a carry chain is proposed. Dual-edge-triggered flip-flops are used in the phase-shifted circuit to generate signals with 45 degrees phase shift, which not only improves the resolution of the DPWM but also reduces the resource consumption in the carry chain. Furthermore, a hardware compensation method is used to solve the duty cycle increment phenomenon that affects the regulation accuracy of converter. An 11-bit DPWM with the proposed architecture is implemented and tested by Xilinx Artix-7 FPGA. The experimental results show a high resolution of 32 ps and a good linearity whereR(2)is 0.99 and verify the effect of duty cycle compensation.
Year
DOI
Venue
2021
10.1002/cta.2885
INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS
Keywords
DocType
Volume
digital pulse width modulator, dual-edge-triggered flip-flops, duty cycle compensation, hybrid architecture, resolution
Journal
49
Issue
ISSN
Citations 
1
0098-9886
0
PageRank 
References 
Authors
0.34
0
5
Name
Order
Citations
PageRank
Xin Cheng100.34
Bin Li200.34
Haowen Zhu300.34
Yongqiang Zhang44611.22
Zhang Zhang558.09