Title | ||
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DP-Sim: A Full-stack Simulation Infrastructure for Digital Processing In-Memory Architectures |
Abstract | ||
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ABSTRACTDigital processing in-memory (DPIM) is a promising technology that significantly reduces data movements while providing high parallelism. In this work, we design and implement the first full-stack DPIM simulation infrastructure, DP-Sim, which evaluates a comprehensive range of DPIM-specific design space concerning both software and hardware. DP-Sim provides a C++ library to enable DPIM acceleration in general programs while supporting several aspects of software-level exploration by a convenient interface. The DP-Sim software front-end generates specialized instructions that can be processed by a hardware simulator based on a new DPIM-enabled architecture model which is 10.3% faster than conventional memory simulation models. We use DP-Sim to explore the DPIM-specific design space of acceleration for various emerging applications. Our experiments show that bank-level control is 11.3x faster than conventional channel-level control because of higher computing parallelism. Furthermore, cost-aware memory allocation can provide at least 2.2x speedup vs. heuristic methods, showing the importance of data layout in DPIM acceleration. |
Year | DOI | Venue |
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2021 | 10.1145/3394885.3431525 | ASPDAC |
DocType | ISSN | Citations |
Conference | 2153-6961 | 2 |
PageRank | References | Authors |
0.37 | 0 | 5 |
Name | Order | Citations | PageRank |
---|---|---|---|
Minxuan Zhou | 1 | 20 | 4.00 |
Mohsen Imani | 2 | 341 | 48.13 |
Yeseong Kim | 3 | 2 | 3.08 |
Saransh Gupta | 4 | 101 | 11.58 |
Tajana Simunic | 5 | 3198 | 266.23 |