Title
A 1 MS/s 9.15 ENOB Low-Power SAR ADC with Triple-Charge-Sharing Technique
Abstract
This paper presents a 10-b 1 MS/s SAR ADC with a proposed triple-charge-sharing technique to reduce switching energy. The proposed technique uses an additional reservoir capacitor, which has 10% of total CDAC size, to recycle 56% of switching energy. The energy-saving efficiency of this technique is most noticeable in MSBs, so the number of the MSBs to apply the technique has been optimized. The prototype of the proposed SAR ADC is implemented in a 28 nm CMOS technology at 1 V supply voltage. Logic power is minimized with 0.4 V supply voltage. The proposed SAR ADC consumes 2.02 μ W and achieves ENOB of 9.15, equivalent to a Walden FoM of 3.55 fJ/conversion-step.
Year
DOI
Venue
2020
10.1109/ISOCC50952.2020.9332980
2020 International SoC Design Conference (ISOCC)
Keywords
DocType
ISSN
SAR ADC,low-power consumption,reservoir capacitor,charge sharing,triple-charge-sharing,TCS
Conference
2163-9612
ISBN
Citations 
PageRank 
978-1-7281-8332-9
0
0.34
References 
Authors
0
7
Name
Order
Citations
PageRank
Soonsung Ahn100.34
Jaegeun Song242.47
Chaegang Lim3112.26
Yohan Choi432.14
Sooho Park510.71
Yunsoo Park672.52
Chulwoo Kim739774.58