Name
Abstract | ||
|---|---|---|
Cryogenic CMOS (cryo-CMOS) support of quantum processors is becoming a necessity to ensure the continuous growth of qubit count, so as to achieve scalable, fault-tolerant quantum computers. The first paper of the session describes an integrated controller for spin qubits that performs state manipulation, readout, and gate pulsing fabricated in 22nm FinFET CMOS technology. The second paper presents a fully integrated SoC for spin qubit interface based on RF reflectometry of quantum dots, all implemented in 40nm CMOS technology, for scalable quantum systems operating at 3.5K. The third paper also focuses on scalable RF based readout of spin qubits for a record 0.17mW/qubit power requirement, operating at 4.2K. The fourth paper proposes a 1GS/s A/D converter for low-power digitization of the signal measured from a qubit readout that achieves a FOM of 15fJ/conv.-step at 4K. |
Year | DOI | Venue |
|---|---|---|
2021 | 10.1109/ISSCC42613.2021.9365785 | 2021 IEEE International Solid- State Circuits Conference (ISSCC) |
DocType | Volume | ISSN |
Conference | 64 | 0193-6530 |
ISBN | Citations | PageRank |
978-1-7281-9550-6 | 0 | 0.34 |
References | Authors | |
0 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Denis Daly | 1 | 2 | 2.15 |
| Shawn S. H. Hsu | 2 | 29 | 7.01 |
| Edoardo Charbon | 3 | 385 | 74.69 |