Name
Title | ||
|---|---|---|
A Time Amplifier Assisted Frequency-to-Digital Converter Based Digital Fractional- N PLL |
Abstract | ||
|---|---|---|
This article presents a wide input-range delay chain based time amplifier (TA) and its application to a 6.5-GHz digital fractional- $N$ phase-locked loop (PLL). The TA includes a delay-averaging linearity enhancement technique and the PLL is based on an improved dual-mode ring oscillator (DMRO) delta-sigma ( <t... |
Year | DOI | Venue |
|---|---|---|
2021 | 10.1109/JSSC.2020.3048650 | IEEE Journal of Solid-State Circuits |
Keywords | DocType | Volume |
Phase locked loops,Delays,Phase noise,Quantization (signal),Calibration,Phase frequency detectors,Transistors | Journal | 56 |
Issue | ISSN | Citations |
9 | 0018-9200 | 0 |
PageRank | References | Authors |
0.34 | 0 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Eslam Helal | 1 | 0 | 0.34 |
| Enrique Alvarez-Fontecilla | 2 | 2 | 2.41 |
| Amr I. Eissa | 3 | 0 | 0.34 |
| Ian Galton | 4 | 0 | 0.34 |