Name
Title | ||
|---|---|---|
Balanced and Compressed Coordinate Layout for the Sparse Matrix-Vector Product on GPUs |
Abstract | ||
|---|---|---|
We contribute to the optimization of the sparse matrixvector product on graphics processing units by introducing a variant of the coordinate sparse matrix layout that compresses the integer representation of the matrix indices. In addition, we employ a look-ahead table to avoid the storage of repeated numerical values in the sparse matrix, yielding a more compact data representation that is easier to maintain in the cache. Our evaluation on the two most recent generations of NVIDIA GPUs, the V100 and the A100 architectures, shows considerable performance improvements over the kernels for the sparse matrix-vector product in cuSPARSE (CUDA 11.0.167). |
Year | DOI | Venue |
|---|---|---|
2020 | 10.1007/978-3-030-71593-9_7 | EURO-PAR 2020: PARALLEL PROCESSING WORKSHOPS |
Keywords | DocType | Volume |
Sparse matrix-vector product, Sparse matrix data layouts, Sparse linear algebra, High performance computing, GPUs | Conference | 12480 |
ISSN | Citations | PageRank |
0302-9743 | 0 | 0.34 |
References | Authors | |
0 | 5 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| José Ignacio Aliaga | 1 | 75 | 15.18 |
| Hartwig Anzt | 2 | 0 | 0.68 |
| Enrique S. Quintana-Ortí | 3 | 0 | 0.34 |
| Andrés E. Tomás | 4 | 0 | 0.34 |
| Yuhsiang M. Tsai | 5 | 2 | 2.76 |