Abstract | ||
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Processing-in-memory (PIM) architectures attempt to overcome the von Neumann bottleneck by combining computation and storage logic into a single component. The content-addressable parallel processing paradigm (CAPP) from the seventies is an in-situ PIM architecture that leverages content-addressable memories to realize bit-serial arithmetic and logic operations, via sequences of search and update ... |
Year | DOI | Venue |
---|---|---|
2021 | 10.1109/HPCA51647.2021.00054 | 2021 IEEE International Symposium on High-Performance Computer Architecture (HPCA) |
Keywords | DocType | ISSN |
Out of order,Microarchitecture,Random access memory,Computer architecture,Parallel processing,Associative processing,Engines | Conference | 1530-0897 |
ISBN | Citations | PageRank |
978-1-6654-2235-2 | 3 | 0.39 |
References | Authors | |
0 | 9 |
Name | Order | Citations | PageRank |
---|---|---|---|
Helena Caminal | 1 | 9 | 2.27 |
Kailin Yang | 2 | 3 | 0.39 |
Srivatsa Srinivasa | 3 | 3 | 0.39 |
Akshay Krishna Ramanathan | 4 | 7 | 3.86 |
Khalid Al-Hawaj | 5 | 5 | 1.42 |
Tianshu Wu | 6 | 4 | 0.73 |
Narayanan Vijaykrishnan | 7 | 6955 | 524.60 |
Narayanan Vijaykrishnan | 8 | 6955 | 524.60 |
Christopher Batten | 9 | 478 | 34.23 |