Name
Abstract | ||
|---|---|---|
Errors of vector-matrix-multiplication induced by interconnect resistance become a crucial reliability challenge in non-volatile memory (NVM) based neural network. Here, we propose a novel weight mapping method, called weight mapping correction (WMC), to mitigate the deviation of weight represented by the conductance of NVM array without time-consuming retraining and circuit overheads. Simulation ... |
Year | DOI | Venue |
|---|---|---|
2021 | 10.1109/IRPS46558.2021.9405200 | 2021 IEEE International Reliability Physics Symposium (IRPS) |
Keywords | DocType | ISSN |
Resistance,Nonvolatile memory,Simulation,Neural networks,Integrated circuit interconnections,Software,Software reliability | Conference | 1541-7026 |
ISBN | Citations | PageRank |
978-1-7281-6893-7 | 1 | 0.35 |
References | Authors | |
0 | 7 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| L.X. Han | 1 | 1 | 0.35 |
| Y.C. Xiang | 2 | 1 | 0.35 |
| P. Huang | 3 | 1 | 0.35 |
| G. H. Yu | 4 | 1 | 0.35 |
| R. Z. Han | 5 | 4 | 1.06 |
| X. Y. Liu | 6 | 1 | 0.35 |
| J. F. Kang | 7 | 7 | 1.54 |