Title | ||
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Bayesian Optimization Approach For Analog Circuit Design Using Multi-Task Gaussian Process |
Abstract | ||
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In this paper, we propose an efficient Bayesian optimization approach for analog circuit synthesis based on the multi-task Gaussian process model. Instead of building the Gaussian process models separately for each circuit specification as the traditional Bayesian optimization methods do, we extend the Gaussian process to a vector-valued function with a shared covariance function to learn the dependencies between different specifications of circuits. The weighted expected improvement function is selected as the acquisition function to cope with the constraints. The experimental results show that the proposed method can reduce the number of simulations while achieving better optimization results. |
Year | DOI | Venue |
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2021 | 10.1109/ISCAS51556.2021.9401205 | 2021 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) |
Keywords | DocType | ISSN |
Bayesian optimization, Multi-task Gaussian process, Analog circuit Design | Conference | 0271-4302 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
7 |
Name | Order | Citations | PageRank |
---|---|---|---|
Jiangli Huang | 1 | 0 | 0.34 |
Shuhan Zhang | 2 | 10 | 6.28 |
Cong Tao | 3 | 0 | 0.34 |
Fan Yang | 4 | 25 | 6.98 |
Changhao Yan | 5 | 27 | 6.64 |
Dian Zhou | 6 | 260 | 56.14 |
Xuan Zeng | 7 | 408 | 75.96 |