Name
Title | ||
|---|---|---|
An Ultra-Low Leakage Bitcell Structure with the Feedforward Self-Suppression Scheme for Near-Threshold SRAM |
Abstract | ||
|---|---|---|
Leakage power consumption has become a critical issue for low power Static Random-Access Memory (SRAM) design in the near-threshold regime. In this paper, an ultra-low leakage fourteen-transistor SRAM bitcell structure with the feedforward self-suppression scheme is presented. To reduce the leakage power significantly as well as maintain the data stability in hold state, a cross-coupled dynamic leakage-suppression inverter-based structure is adopted. Furthermore, the bypass scheme is employed to enable the speed modulation for bitcell read and write operations. As compared with state-of-the-art designs, a 65 nm 8kb SRAM array with the proposed bitcell structure achieves 75x leakage power, 45% write power as well as 65% read power reduction at 0.4V. Further comparisons with different processes verify up to 38k times leakage power reduction in 130nm planar process and 139x in 7nm plus FinFET process. |
Year | DOI | Venue |
|---|---|---|
2021 | 10.1109/ISCAS51556.2021.9401717 | 2021 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) |
Keywords | DocType | ISSN |
SRAM, bitcell structure, near-threshold, ultra-low leakage, leakage suppression, super-cutoff | Conference | 0271-4302 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
5 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Hao Zhang | 1 | 0 | 1.69 |
| Jieyu Li | 2 | 3 | 4.80 |
| Weifeng He | 3 | 61 | 14.69 |
| Yanan Sun | 4 | 2 | 2.76 |
| Mingoo Seok | 5 | 11 | 6.77 |