Name
Abstract | ||
|---|---|---|
Since Deep Convolutional Neural Network (DCNN) training involves complex computations and data transmissions, the previous DCNN processors hard to achieve ideal energy efficiency. This paper proposed a DCNN processor supports both inference and training for the embedded system. The processor contains three heterogeneous cores to provide distinct computation patterns and dataflow for different training phases. In addition, since inference takes up more than 90% of the workload of the DCNN application, the three cores of the processor can be reconfigured to efficiently support the inference to achieve leading resources Utilization. The processor is fabricated in 55nm CMOS technology, post-layout simulation shows the processor achieving 1.36 Tops/w energy efficiency for training and 2.44 Tops/w for the inference. |
Year | DOI | Venue |
|---|---|---|
2021 | 10.1109/ISCAS51556.2021.9401113 | 2021 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) |
Keywords | DocType | ISSN |
DCNN, Processor, Training, Heterogeneous | Conference | 0271-4302 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Xiaobai Chen | 1 | 1 | 1.36 |
| Weibei Fan | 2 | 1 | 1.36 |
| Yong Xie | 3 | 0 | 2.70 |
| Fu Xiao | 4 | 115 | 35.24 |