Name
Abstract | ||
|---|---|---|
Per-flow spread measurement in high-speed networks has many practical applications. It is a more difficult problem than the traditional per-flow size measurement. Most prior work is based on sketches, focusing on reducing their space requirements in order to fit in on-chip cache memory. This design allows the measurement to be performed at the line rate, but it suffers from expensive computation f... |
Year | DOI | Venue |
|---|---|---|
2021 | 10.1109/TNET.2021.3078725 | IEEE/ACM Transactions on Networking |
Keywords | DocType | Volume |
System-on-chip,Estimation,Size measurement,Art,High-speed networks,Probabilistic logic,Throughput | Journal | 29 |
Issue | ISSN | Citations |
5 | 1063-6692 | 1 |
PageRank | References | Authors |
0.35 | 0 | 7 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| He Huang | 1 | 829 | 65.14 |
| Yu-e Sun | 2 | 33 | 7.07 |
| Chaoyi Ma | 3 | 16 | 4.26 |
| Shigang Chen | 4 | 2568 | 187.11 |
| Yang Du | 5 | 14 | 6.47 |
| Haibo Wang | 6 | 7 | 2.79 |
| Qingjun Xiao | 7 | 291 | 22.32 |