Title
20 Gb/s WDM Optical RAM Row Architecture based on four Monolithic Integrated InP Memory Cells
Abstract
A complete 4-bit WDM-enabled all-optical RAM Row architecture with 20 Gb/s memory-bus throughput is experimentally presented for the first time, using four 5Gb/s monolithic InP Flip-Flops and a multi-wavelength Random Access and Column Selector peripheral circuit.
Year
Venue
DocType
2021
2021 OPTICAL FIBER COMMUNICATIONS CONFERENCE AND EXPOSITION (OFC)
Conference
Citations 
PageRank 
References 
0
0.34
0
Authors
5