Name
Title | ||
|---|---|---|
A Feedforward and Feedback Constant-Slope Digital-to-Time Converter in 28nm CMOS Achieving ≤ 0.12% INL/Range over >100mV Supply Range |
Abstract | ||
|---|---|---|
Advanced techniques focusing on ultra-low jitter and spurs in integer-N PLLs, such as subsampling, injection locking and type-I architectures, have been extensively explored in the last decade. To accommodate new communication protocols, it is more attractive to push these high performance PLLs to a fractional-N operation. One major issue related to the fractional-N PLLs are fractional spurs, especially the in-band spurs that cannot be simply filtered out by the PLL loop but which can ruin the spectral performance. Phase interpolators (PI) and digital-to-time converters (DTC) are commonly used to assist in reducing the phase detection quantization error. The linearity, range, jitter and power are the main trade-offs in these blocks’ design. A DTC with >9-b (<0.2% INL/range) linearity is favored in the fractional-N PLLs targeting <-50dBc in-band fractional spurs. This work presents techniques to minimize the nonlinearities and power in the proposed constant slope DTC. Figure 1 shows the complete schematic of the proposed design. With feedforward (FF) and feedback (FB) techniques and nonlinearity cancellation, the implemented DTC runs at 50MHz and features 543ps delay range, 0.11% INL/Range, 36uW power consumption. |
Year | DOI | Venue |
|---|---|---|
2021 | 10.23919/VLSICircuits52068.2021.9492452 | 2021 Symposium on VLSI Circuits |
Keywords | DocType | ISSN |
nonlinearity cancellation,block design,DTC,feedforward constant-slope digital-to-time converter,feedback constant-slope digital-to-time converter,phase detection quantization error,digital-to-time converters,phase interpolators,spectral performance,PLL loop,in-band spurs,fractional-N operation,high performance PLLs,communication protocols,integer-N PLLs,ultra-low jitter,constant slope DTC,in-band fractional spurs,fractional-N PLLs,size 28.0 nm,voltage 100.0 mV,frequency 50.0 MHz,time 543.0 ps,power 36 muW | Conference | 2158-5601 |
ISBN | Citations | PageRank |
978-1-6654-4766-9 | 0 | 0.34 |
References | Authors | |
0 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Peng Chen | 1 | 0 | 0.34 |
| Feifei Zhang | 2 | 61 | 19.93 |
| Suoping Hu | 3 | 10 | 1.64 |
| Robert Bogdan Staszewski | 4 | 536 | 93.76 |