MN-Core - A Highly Efficient and Scalable Approach to Deep Learning

Paper Info

Title
MN-Core - A Highly Efficient and Scalable Approach to Deep Learning

Abstract
MN-Core is a highly efficient deep learning training accelerator reaching in excess of 1 TFLOPS/W (half-precision) at board level in real-world mixed-precision workloads. To reach and sustain this level of performance, the design is partitioned and packaged as four-die MCM package exceeding 3000mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> of die area.

Year	DOI	Venue
2021	10.23919/VLSICircuits52068.2021.9492395	2021 Symposium on VLSI Circuits
Keywords	DocType	ISSN
Accelerator,MCM,Deep Learning,HPC,SIMD	Conference	2158-5601
ISBN	Citations	PageRank
978-1-6654-4766-9	0	0.34
References	Authors
0	26

Authors (26 rows)

Cited by (0 rows)

References (0 rows)

Name	Order	Citations	PageRank
K. Namura	1	0	0.34
Johannes Maximilian Kühn	2	0	1.35
Tohru Adachi	3	0	0.34
H. Imachi	4	0	0.34
H. Kaneko	5	0	0.34
T. Kato	6	0	0.34
Go Watanabe	7	0	0.34
Naoto Tanaka	8	0	0.34
S. Kashihara	9	0	0.34
Hiroaki Miyashita	10	0	0.68
Y. Tomonaga	11	0	0.34
Ryosuke Okuta	12	7	0.91
Takuya Akiba	13	378	20.70
Brian Vogel	14	7	0.91
S. Kitajo	15	0	0.34
F. Osawa	16	0	0.34
K. Takahashi	17	0	0.34
Y. Takatsukasa	18	0	0.34
K. Mizumaru	19	0	0.34
T. Yamauchi	20	0	0.34
J. Ono	21	0	0.34
A. Takahashi	22	0	0.34
Tanvir Ahmed	23	0	1.01
Yoshiharu Doi	24	1	1.45
K. Hiraki	25	0	0.34
Junichiro Makino	26	147	34.17