Title | ||
---|---|---|
A 2.6 e-rms Low-Random-Noise, 116.2 mW Low-Power 2-Mp Global Shutter CMOS Image Sensor with Pixel-Level ADC and In-Pixel Memory |
Abstract | ||
---|---|---|
This paper presents a low-random noise of 2.6 e-rms, a low-power of 116.2 mW at video rate, and a high-speed up to 960 fps 2-mega pixels global-shutter type CMOS image sensor (CIS) using an advanced DRAM technology. To achieve a high performance global-shutter CIS, we proposed a novel architecture for the digital pixel sensor which is a remarkable global-shutter operation CIS with a pixel-wise ADC and an in-pixel digital memory. Each pixel has two small-pitch Cu-to-Cu interconnectors for the wafer-level stacking, and the pitch of each unit pixel is less than 5 μm which is the world’s smallest pixel embedding both pixel-level ADC and 22-bit memories. |
Year | DOI | Venue |
---|---|---|
2021 | 10.23919/VLSICircuits52068.2021.9492357 | 2021 Symposium on VLSI Technology |
DocType | ISSN | ISBN |
Conference | 0743-1562 | 978-1-6654-3009-8 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
25 |
Name | Order | Citations | PageRank |
---|---|---|---|
Min-Woong Seo | 1 | 1 | 1.03 |
Myunglae Chu | 2 | 0 | 0.34 |
Hyun-Yong Jung | 3 | 0 | 0.34 |
Suksan Kim | 4 | 0 | 0.34 |
Jiyoun Song | 5 | 1 | 1.03 |
Junan Lee | 6 | 0 | 0.34 |
Yong-sung Kim | 7 | 310 | 28.97 |
Jongyeon Lee | 8 | 0 | 0.34 |
Sung-Jae Byun | 9 | 0 | 0.34 |
Daehee Bae | 10 | 0 | 0.34 |
Minkyung Kim | 11 | 0 | 0.34 |
Gwi-Deok Lee | 12 | 0 | 0.34 |
Heesung Shim | 13 | 0 | 0.34 |
Changyong Um | 14 | 0 | 0.34 |
Changhwa Kim | 15 | 0 | 0.34 |
In-Gyu Baek | 16 | 1 | 1.03 |
Doowon Kwon | 17 | 0 | 1.35 |
hongki kim | 18 | 1 | 0.69 |
Hyuksoon Choi | 19 | 0 | 0.34 |
Jonghyun Go | 20 | 0 | 0.34 |
JungChak Ahn | 21 | 0 | 0.34 |
Jaekyu Lee | 22 | 1 | 1.03 |
Changrok Moon | 23 | 0 | 0.34 |
Kyupil Lee | 24 | 1 | 1.37 |
Hyoung-Sub Kim | 25 | 0 | 0.34 |