Name
Abstract | ||
|---|---|---|
This paper describes a Field Programmable Gate Array (FPGA) implementation of a multi-Gb/s Block Filtered (BF) OFDM transceiver, fully 5G NR compatible. The main obstacles for such a work are (i) the support of multiple configurations and parameters, (ii) the high bandwidth w.r.t the board clock frequency and (iii) the intrinsic complexity of BF-OFDM. We prove that despite these barriers an hardware implementation of this waveform is possible, even with a bandwidth up to 400 MHz. We based our developments on the following pillars: smart layout of the basic modules, parallelization of dedicated functions design and ad hoc architecture. Measurements and complexity analysis demonstrate the high flexibility of BF-OFDM. |
Year | DOI | Venue |
|---|---|---|
2021 | 10.1109/EuCNC/6GSummit51104.2021.9482424 | 2021 Joint European Conference on Networks and Communications & 6G Summit (EuCNC/6G Summit) |
Keywords | DocType | ISSN |
5G,FPGA,BF-OFDM,wideband,parallelization | Conference | 2475-6490 |
ISBN | Citations | PageRank |
978-1-6654-3021-0 | 1 | 0.39 |
References | Authors | |
0 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jean-Baptiste Dore | 1 | 5 | 3.32 |
| Marc Laugeois | 2 | 1 | 0.72 |
| Nicolas Cassiau | 3 | 1 | 1.06 |
| Xavier Popon | 4 | 1 | 1.06 |