Name
Title | ||
|---|---|---|
IChannels: Exploiting Current Management Mechanisms to Create Covert Channels in Modern Processors |
Abstract | ||
|---|---|---|
To operate efficiently across a wide range of workloads with varying power requirements, a modern processor applies different current management mechanisms, which briefly throttle instruction execution while they adjust voltage and frequency to accommodate for power-hungry instructions (PHIs) in the instruction stream. Doing so 1) reduces the power consumption of non-PHI instructions in typical workloads and 2) optimizes system voltage regulators’ cost and area for the common use case while limiting current consumption when executing PHIs.However, these mechanisms may compromise a system’s confidentiality guarantees. In particular, we observe that multilevel side-effects of throttling mechanisms, due to PHI-related current management mechanisms, can be detected by two different software contexts (i.e., sender and receiver) running on 1) the same hardware thread, 2) co-located Simultaneous Multi-Threading (SMT) threads, and 3) different physical cores.Based on these new observations on current management mechanisms, we develop a new set of covert channels, IChannels, and demonstrate them in real modern Intel processors (which span more than 70% of the entire client and server processor market). Our analysis shows that IChannels provides more than 24× the channel capacity of state-of-the-art power management covert channels. We propose practical and effective mitigations to each covert channel in IChannels by leveraging the insights we gain through a rigorous characterization of real systems. |
Year | DOI | Venue |
|---|---|---|
2021 | 10.1109/ISCA52012.2021.00081 | 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA) |
Keywords | DocType | ISSN |
modern Intel processors,server processor market,IChannels,state-of-the-art power management covert channels,covert channel,covert channels,power requirements,modern processor,management mechanisms,instruction execution,power-hungry instructions,channel capacity,SMT threads,colocated simultaneous multithreading,different software contexts,throttling mechanisms,current consumption,system voltage regulators,typical workloads,nonPHI instructions,power consumption,instruction stream | Conference | 1063-6897 |
ISBN | Citations | PageRank |
978-1-6654-3334-1 | 2 | 0.35 |
References | Authors | |
0 | 8 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jawad Haj-Yahya | 1 | 2 | 1.03 |
| Lois Orosa | 2 | 22 | 4.20 |
| Jeremie Kim | 3 | 263 | 13.68 |
| Juan Gómez-Luna | 4 | 209 | 23.34 |
| Abdullah Giray Yaglikçi | 5 | 2 | 0.35 |
| Mohammed Alser | 6 | 2 | 0.35 |
| Ivan Puddu | 7 | 4 | 1.04 |
| Onur Mutlu | 8 | 9446 | 357.40 |