Name
Abstract | ||
|---|---|---|
We evaluate a new processing-in-memory (PIM) architecture from UPMEM that was built and deployed in an offthe-shelf server. Systems designed to perform computing in or near memory have been proposed for decades to overcome the proverbial memory wall, yet most never made it past blueprints or simulations. When the hardware is actually built and integrated into a fully functioning system, it must address realistic constraints that may be overlooked in a simulation. Evaluating a real implementation can reveal valuable insights. Our experiments on five commonly used applications highlight the main strength of this architecture: computing capability and the internal memory bandwidth scale with memory size. This property helps some applications defy the von-Neumann bottleneck, while for others, architectural limitations stand in the way of reaching the hardware potential. Our analysis explains why. |
Year | Venue | DocType |
|---|---|---|
2021 | PROCEEDINGS OF THE 2021 USENIX ANNUAL TECHNICAL CONFERENCE | Conference |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
11 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Joel Nider | 1 | 0 | 0.34 |
| Craig Mustard | 2 | 42 | 4.54 |
| Andrada Zoltan | 3 | 0 | 0.34 |
| John Ramsden | 4 | 0 | 0.34 |
| Larry Liu | 5 | 0 | 0.34 |
| Jacob Grossbard | 6 | 0 | 0.34 |
| Mohammad Dashti | 7 | 46 | 4.52 |
| Romaric Jodin | 8 | 0 | 0.34 |
| Alexandre Ghiti | 9 | 0 | 0.34 |
| Jordi Chauzi | 10 | 0 | 0.34 |
| Alexandra Fedorova | 11 | 1184 | 61.05 |