Title | ||
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An FPGA-Based Energy-Efficient Reconfigurable Convolutional Neural Network Accelerator for Object Recognition Applications |
Abstract | ||
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The computational efficiency is the prime concern of a computation-intensive deep convolutional neural network (CNN). In this Brief, we report an FPGA-based computation-efficient reconfigurable CNN accelerator. It innovates in the utilization of a kernel partition technique to substantially reduce the repeated access to the input feature maps and the kernels. As a result, it balances the ability f... |
Year | DOI | Venue |
---|---|---|
2021 | 10.1109/TCSII.2021.3095283 | IEEE Transactions on Circuits and Systems II: Express Briefs |
Keywords | DocType | Volume |
Frequency modulation,Kernel,Throughput,Parallel processing,Memory management,Field programmable gate arrays,Computational efficiency | Journal | 68 |
Issue | ISSN | Citations |
9 | 1549-7747 | 4 |
PageRank | References | Authors |
0.46 | 0 | 5 |
Name | Order | Citations | PageRank |
---|---|---|---|
Jixuan Li | 1 | 4 | 0.46 |
Ka-Fai Un | 2 | 4 | 0.46 |
Wei-Han Yu | 3 | 4 | 0.46 |
Peng Un Mak | 4 | 301 | 65.06 |
Rui Paulo Martins | 5 | 43 | 7.21 |