Abstract | ||
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Switch delay dominates communication latencies in interconnection networks, especially for short messages because switch delays are massive relative to the link and packet injection delays. At a conventional switch, routing decision is based on CAM (Content Addressable Memory) table lookup, and it imposes a significant delay. Reducing the access latency to CAM is crucial for the upcoming low-delay... |
Year | DOI | Venue |
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2021 | 10.1109/Cluster48925.2021.00041 | 2021 IEEE International Conference on Cluster Computing (CLUSTER) |
Keywords | DocType | ISSN |
Hash functions,Network topology,Multiprocessor interconnection,Switches,Performance gain,Throughput,Routing | Conference | 1552-5244 |
ISBN | Citations | PageRank |
978-1-7281-9666-4 | 0 | 0.34 |
References | Authors | |
0 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Shoichi Hirasawa | 1 | 21 | 8.38 |
Hayato Yamaki | 2 | 0 | 3.04 |
Michihiro Koibuchi | 3 | 726 | 74.68 |