Name
Abstract | ||
|---|---|---|
Field Programmable Gate Arrays (FPGAs) have been targeted as a new accelerator of the HPC field. This is because the barrier to using FPGAs has been gradually lowered due to the widespread use of high-level synthesis (HLS) technology. In addition, the bandwidth of external memory in FPGAs is much lower than that of other accelerators widely used in HPC, such as NVIDIA V100 GPUs. However, the lates... |
Year | DOI | Venue |
|---|---|---|
2021 | 10.1109/Cluster48925.2021.00116 | 2021 IEEE International Conference on Cluster Computing (CLUSTER) |
Keywords | DocType | ISSN |
Conferences,Memory management,Prototypes,Bandwidth,Cluster computing,C++ languages,Logic gates | Conference | 1552-5244 |
ISBN | Citations | PageRank |
978-1-7281-9666-4 | 0 | 0.34 |
References | Authors | |
0 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Norihisa Fujita | 1 | 22 | 7.20 |
| Ryohei Kobayashi | 2 | 14 | 4.23 |
| Yoshiki Yamaguchi | 3 | 231 | 34.53 |
| Taisuke Boku | 4 | 770 | 81.89 |