Title | ||
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A Low-Power Transprecision Floating-Point Cluster for Efficient Near-Sensor Data Analytics |
Abstract | ||
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Recent applications in low-power (1-20 mW) near-sensor computing require the adoption of floating-point arithmetic to reconcile high precision results with a wide dynamic range. In this article, we propose a low-power multi-core computing cluster that leverages the fined-grained tunable principles of transprecision computing to provide support to near-sensor applications at a minimum power budget. Our solution – based on the open-source RISC-V architecture – combines parallelization and sub-word vectorization with a dedicated interconnect design capable of sharing floating-point units (FPUs) among the cores. On top of this architecture, we provide a full-fledged software stack support, including a parallel low-level runtime, a compilation toolchain, and a high-level programming model, with the aim to support the development of end-to-end applications. We performed an exhaustive exploration of the design space of the transprecision cluster on a cycle-accurate FPGA emulator, varying the number of cores and FPUs to maximize performance. Orthogonally, we performed a vertical exploration to identify the most efficient solutions in terms of non-functional requirements (operating frequency, power, and area). We conducted an experimental assessment on a set of benchmarks representative of the near-sensor processing domain, complementing the timing results with a post place-&-route analysis of the power consumption. A comparison with the state-of-the-art shows that our solution outperforms the competitors in energy efficiency, reaching a peak of 97 Gflop/s/W on single-precision scalars and 162 Gflop/s/W on half-precision vectors. Finally, a real-life use case demonstrates the effectiveness of our approach in fulfilling accuracy constraints. |
Year | DOI | Venue |
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2022 | 10.1109/TPDS.2021.3101764 | IEEE Transactions on Parallel and Distributed Systems |
Keywords | DocType | Volume |
RISC-V,transprecision,parallel computing,sub-word vectorization,FPU interconnect,near-sensor computing | Journal | 33 |
Issue | ISSN | Citations |
5 | 1045-9219 | 1 |
PageRank | References | Authors |
0.36 | 0 | 8 |
Name | Order | Citations | PageRank |
---|---|---|---|
Fabio Montagna | 1 | 1 | 0.36 |
Stefan Mach | 2 | 15 | 2.83 |
Simone Benatti | 3 | 1 | 0.36 |
Angelo Garofalo | 4 | 4 | 2.47 |
Gianmarco Ottavi | 5 | 1 | 0.36 |
Luca Benini | 6 | 13116 | 1188.49 |
Davide Rossi | 7 | 1 | 0.36 |
Giuseppe Tagliavini | 8 | 1 | 0.36 |