Name
Title | ||
|---|---|---|
A 40-nm CMOS Multifunctional Computing-in-Memory (CIM) Using Single-Ended Disturb-Free 7T 1-Kb SRAM |
Abstract | ||
|---|---|---|
This investigation proposes a computing-in-memory (CIM) design to circumvent the von Neumann bottleneck which causes limited computation throughput for effective artificial intelligence (AI) applications. The proposed CIM performs multiple operations such as single-instruction basic Boolean operations, addition, and signed number multiplication, and multiple functions such as normal mode and reten... |
Year | DOI | Venue |
|---|---|---|
2021 | 10.1109/TVLSI.2021.3115970 | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
Keywords | DocType | Volume |
Random access memory,Switches,Built-in self-test,Computer architecture,Writing,Common Information Model (computing),Switching circuits | Journal | 29 |
Issue | ISSN | Citations |
12 | 1063-8210 | 0 |
PageRank | References | Authors |
0.34 | 0 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Chua-chin Wang | 1 | 474 | 107.39 |
| Lean Karlo S. Tolentino | 2 | 0 | 1.35 |
| Chia-Yi Huang | 3 | 0 | 0.34 |
| Chia-Hung Yeh | 4 | 367 | 42.15 |