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FPGA Design and Implementation of Driving Lane Detection on Zynq-7000 SoC.
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Open Visualization
Title
FPGA Design and Implementation of Driving Lane Detection on Zynq-7000 SoC.
Year
DOI
Venue
2021
10.23919/MIPRO52101.2021.9596986
MIPRO
DocType
Citations
PageRank
Conference
0
0.34
References
Authors
0
4
Authors (4 rows)
Cited by (0 rows)
References (0 rows)
Name
Order
Citations
PageRank
M. Martin
1
10
3.08
Ratko Grbic
2
0
0.68
M. Subotic
3
0
0.34
Ivan Kastelan
4
0
0.34
1