Title
Energy-efficient charge sharing-based 8T2C SRAM in-memory accelerator for binary neural networks in 28nm CMOS
Abstract
We present an 8-transistor and 2-capacitor (8T2C) SRAM cell-based in-memory hardware for Binary Neural Network (BNN) computation. The proposed design accumulates multiplication results using a DRAM-like charge sharing operation, which makes it more tolerant to process variations and avoiding issues that hinder low voltage operations of conventional SRAM-CIM designs. Measurement results show that a...
Year
DOI
Venue
2021
10.1109/A-SSCC53895.2021.9634784
2021 IEEE Asian Solid-State Circuits Conference (A-SSCC)
Keywords
DocType
ISBN
Low voltage,Conferences,Neural networks,Random access memory,Energy measurement,Hardware,Energy efficiency
Conference
978-1-6654-4350-0
Citations 
PageRank 
References 
0
0.34
0
Authors
7
Name
Order
Citations
PageRank
Hyunmyung Oh101.35
Hyungjun Kim200.34
Daehyun Ahn300.34
Jihoon Park400.34
Yulhwa Kim500.34
Inhwan Lee600.34
Jae-Joon Kim700.34