Title
Improving Ge-rich GST ePCM reliability through BEOL engineering
Abstract
This paper discusses the effect of back-end of line (BEOL) process on cell performance for a Phase-Change Memory embedded in a 28nm FD-SOI platform (ePCM). The impact of BEOL is first shown by describing the microscopic evolution of the active Ge-rich GST alloy during process. Ge clustering has been proven to occur during the fabrication process, impacting the pristine resistance and the after for...
Year
DOI
Venue
2021
10.1109/ESSDERC53440.2021.9631807
ESSDERC 2021 - IEEE 51st European Solid-State Device Research Conference (ESSDERC)
Keywords
DocType
ISSN
Resistance,Performance evaluation,Microscopy,Memory management,Europe,Reliability engineering,Germanium
Conference
1930-8876
ISBN
Citations 
PageRank 
978-1-6654-3748-6
1
0.63
References 
Authors
0
37
Name
Order
Citations
PageRank
A. Redaelli110.96
A. Gandolfo231.12
G. Samanni310.63
E. Gomiero410.63
E. Petroni510.63
L. Scotti610.63
A. Lippiello710.63
P. Mattavelli810.63
J. Jasse910.63
D. Codegoni1010.63
A. Serafini1110.63
R. Ranica1210.63
C. Boccaccio1310.63
J. Sandrini1410.63
R. Berthelon1510.63
JC. Grenier1610.63
O. Weber1710.63
D. Turgis1810.63
A. Valery1910.63
S. Del Medico2010.63
V. Caubet2110.63
JP. Reynard2210.63
D. Dutartre2310.63
L. Favennec2410.63
A. Conte2510.63
F. Disegni2662.37
M. De Tomasi2710.63
A. Ventre2831.45
M. Baldo2910.63
D. Ielmini3010.63
A. Maurelli3131.45
P. Ferreira3231.12
F. Arnaud3310.63
F. Piazza3410.63
P. Cappelletti3531.79
R. Annunziata3610.96
R. Gonella3710.63