Title
SET Mitigation Techniques on Mirror Full Adder at 7 nm FinFET Technology
Abstract
This paper presents a comparative analysis of radiation sensitivity and SET mitigation techniques for the Mirror Full Adder topology implemented with FinFET devices at 7 nm node, considering nominal and near-threshold operation. The mitigation techniques investigated are Decoupling Cells and Transistor Sizing. Transistor Sizing may improved robustness up to $2\mathrm{x}$ (nominal) and c...
Year
DOI
Venue
2021
10.1109/LATS53581.2021.9651889
2021 IEEE 22nd Latin American Test Symposium (LATS)
Keywords
DocType
ISBN
Sensitivity,FinFETs,Robustness,Topology,Mirrors,Transistors,Adders
Conference
978-1-6654-2057-0
Citations 
PageRank 
References 
0
0.34
0
Authors
4