Title
Massively Parallel Big Data Classification on a Programmable Processing In-Memory Architecture
Abstract
With the emergence of Internet of Things, massive data created in the world pose huge technical challenges for efficient processing. Processing in-memory (PIM) technology has been widely investigated to overcome expensive data movements between processors and memory blocks. However, existing PIM designs incur large area overhead to enable computing capability via additional near-data processing cores and analog/mixed signal circuits. In this paper, we propose a new massively-parallel processing in-memory (PIM) architecture, called CHOIR, based on emerging nonvolatile memory technology for big data classification. Unlike existing PIM designs which demand large analog/mixed signal circuits, we support the parallel PIM instructions for conditional and arithmetic operations in an area-efficient way. As a result, the classification solution performs both training and testing on the PIM architecture by fully utilizing the massive parallelism. Our design significantly improves the performance and energy efficiency of the classification tasks by 123x and 52x respectively as compared to the state-of-the-art tree boosting library running on GPU.
Year
DOI
Venue
2021
10.1109/ICCAD51958.2021.9643480
2021 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER AIDED DESIGN (ICCAD)
DocType
ISSN
Citations 
Conference
1933-7760
0
PageRank 
References 
Authors
0.34
0
5
Name
Order
Citations
PageRank
Yeseong Kim123.08
Mohsen Imani200.68
Saransh Gupta310111.58
Minxuan Zhou4204.00
Tajana Simunic53198266.23