Abstract | ||
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The performance trade-off for FET structures with different arrangements of vertically stacked CNTs, including single columns and matrices, is investigated by 3D device simulation including known relevant physical effects such as carrier tunneling through the contact barriers, scattering transport in the channel and electrostatic screening effects. While a single tube gate-all-around (GAA) based s... |
Year | DOI | Venue |
---|---|---|
2021 | 10.1109/BCICTS50416.2021.9682469 | 2021 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS) |
Keywords | DocType | ISBN |
Performance evaluation,Solid modeling,Three-dimensional displays,Metallization,Gallium arsenide,Logic gates,Tunneling | Conference | 978-1-6654-3990-9 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Boli Peng | 1 | 0 | 0.34 |
Sven Mothes | 2 | 0 | 0.34 |
Manojkumar Annamalai | 3 | 0 | 0.34 |
Michael Schröter | 4 | 0 | 0.34 |