Name
Abstract | ||
|---|---|---|
Polymorphic gates are reconfigurable electronic devices that exhibit multiple functionalities under different environments such as temperature, supply voltage, or external signals. Such gates are rare as they do not have a complementary topology and need to satisfy the input-output relationships for more than one functionality. In this paper, we introduce the concept of partial polymorphic gates, which deliver multiple incomplete functions with non-deterministic outputs at certain input combinations. The non-deterministic output is a result of process variations, which are generally believed to be random, unclonable, and different from chip to chip. We utilize this uncertainty as a new mechanism for implementing chip IDs and propose a circuit authentication scheme based on such IDs. Experimental results on ISCAS and MCNC benchmark circuits show that our scheme introduces very low overhead. More specifically, the average overhead in area, speed, and power are 1.11%, 1.88%, and 0.77% respectively for 16-bit IDs, and 2.22%, 2.20%, and 1.18%, respectively for 32-bit IDs. |
Year | DOI | Venue |
|---|---|---|
2021 | 10.1109/AsianHOST53231.2021.9699513 | 2021 Asian Hardware Oriented Security and Trust Symposium (AsianHOST) |
Keywords | DocType | ISBN |
partial polymorphic gate,authentication,ID | Conference | 978-1-6654-4186-5 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
6 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Timothy Dunlap | 1 | 0 | 0.34 |
| Omid Aramoon | 2 | 0 | 0.34 |
| Gang Qu | 3 | 2476 | 270.62 |
| Wang Tian | 4 | 17 | 15.16 |
| Cui Xiaoxin | 5 | 12 | 9.82 |
| Dunshan Yu | 6 | 44 | 12.56 |