Name
Abstract | ||
|---|---|---|
Similar to digital circuits, analog and mixed-signal (AMS) circuits are also susceptible to supply-chain attacks, such as piracy, overproduction, and Trojan insertion. However, unlike digital circuits, the supply-chain security of AMS circuits is less explored. In this work, we propose to perform "logic-locking" on the digital section of the AMS circuits. The idea is to make the analog design intentionally suffer from the effects of process variations, which impede the operation of the circuit. Only on applying the correct key, the effect of process variations are mitigated, and the analog circuit performs as desired. To this end, we render certain components in the analog circuit configurable. We propose an analysis to dictate which components need to be configurable to maximize the effect of an incorrect key. We conduct our analysis on the bandpass filter (BPF), low-noise amplifier (LNA), and low-dropout voltage regulator (LDO) for both correct and incorrect keys to the locked optimizer. We also show experimental results for our technique on a BPF. We also analyze the effect of aging on our locking technique to ensure the reliability of the circuit with the correct key. |
Year | DOI | Venue |
|---|---|---|
2022 | 10.1109/TETC.2020.3025561 | IEEE TRANSACTIONS ON EMERGING TOPICS IN COMPUTING |
Keywords | DocType | Volume |
Analog circuits, Digital circuits, Integrated circuits, Tuning, Security, Logic gates, Transistors, Analog security, process variations, SFLL, aging effect, logic locking, optimization | Journal | 10 |
Issue | ISSN | Citations |
1 | 2168-6750 | 0 |
PageRank | References | Authors |
0.34 | 0 | 5 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Nithyashankari Gummidipoondi Jayasankaran | 1 | 14 | 2.45 |
| Adriana C. Sanabria-Borbon | 2 | 5 | 1.92 |
| Edgar Sánchez-Sinencio | 3 | 0 | 0.34 |
| Jiang Hu | 4 | 668 | 65.67 |
| Jeyavijayan Rajendran | 5 | 0 | 0.34 |