Name
Title | ||
|---|---|---|
Incorporation of a Simple ESD Circuit in a 650V E-Mode GaN HEMT for All-Terminal ESD Protection |
Abstract | ||
|---|---|---|
In this paper, a simple circuit is incorporated in a 650V E-mode GaN HEMT process technology to protect all terminals against ESD stress from any direction. Even in the worst case, with the gate subjected to negative ESD pulse with respect to grounded drain, the 650V E-mode HEMT can still pass 5kV HBM. |
Year | DOI | Venue |
|---|---|---|
2022 | 10.1109/IRPS48227.2022.9764596 | 2022 IEEE International Reliability Physics Symposium (IRPS) |
Keywords | DocType | ISBN |
Resistors,HEMTs,Logic gates,Electrostatic discharges,Transistors,MODFETs,Integrated circuit reliability | Conference | 978-1-6654-7950-9 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
11 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jian-Hsing Lee | 1 | 0 | 0.34 |
| Yeh-Jen Huang | 2 | 0 | 0.34 |
| Li-Yang Hong | 3 | 0 | 0.34 |
| Li-Fan Chen | 4 | 0 | 0.34 |
| Yeh-Ning Jou | 5 | 0 | 0.34 |
| Shin-Cheng Lin | 6 | 0 | 0.34 |
| Walter Wohlmuth | 7 | 0 | 0.34 |
| Chih-Cherng Liao | 8 | 0 | 0.34 |
| Ching-Ho Li | 9 | 0 | 0.34 |
| Shoa-Chang Huang | 10 | 0 | 0.34 |
| Ke-Horng Chen | 11 | 379 | 90.04 |