Paper Info
Title
Analysis and Design of Fourth Harmonic Boosting Technique for THz Signal Generation
Abstract
In this paper, an analysis method is presented to mathematically characterize the harmonic current generated by the voltage at fundamental or harmonic frequency in the transistor of a high-frequency harmonic oscillator. Using this analysis method, the relationship between the second harmonic voltages and the fourth harmonic drain current in the transistor is investigated, and the requirement on the second harmonic voltages for fourth harmonic boosting is found. Moreover, an approach of modeling the voltage-current relationship in the transistor of a high-frequency harmonic oscillator at harmonic frequency as an equivalent linear relationship is proposed. This modeling method facilitates the design of the second harmonic embedding network around the transistor, thus helping to propose a harmonic oscillator topology in which the requirement on the second harmonic voltages for fourth harmonic boosting is fulfilled. Using the proposed fourth harmonic boosting technique, a 0.6-THz radiator array is designed in 40-nm bulk CMOS. In measurement, the 0.68- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text {mm}^{2}$ </tex-math></inline-formula> radiator array achieves a radiated power of 0 dBm and a DC-to-THz efficiency of 0.08% at 586.7 GHz under a 0.9-V supply voltage.
Year
DOI
Venue
2022
10.1109/TCSI.2022.3155477
IEEE Transactions on Circuits and Systems I: Regular Papers
Keywords
DocType
Volume
CMOS,terahertz,nonlinear circuit,voltage-controlled oscillator (VCO),harmonic boosting
Journal
69
Issue
ISSN
Citations 
6
1549-8328
0
PageRank 
References 
Authors
0.34
19
2
Name
Order
Citations
PageRank
Kaizhe Guo100.34
Patrick Reynaert246376.50