Name
Title | ||
|---|---|---|
Carbon Nanotube SRAM in 5-nm Technology Node Design, Optimization, and Performance Evaluation—Part II: CNT Interconnect Optimization |
Abstract | ||
|---|---|---|
The size and parameter optimization for the 5-nm carbon nanotube field effect transistor (CNFET) static random access memory (SRAM) cell was presented in Part I of this article. Based on that work, we propose a carbon nanotube (CNT) SRAM array composed of the schematically optimized CNFET SRAM and CNT interconnects. We consider the interconnects inside the CNFET SRAM cell composed of metallic sing... |
Year | DOI | Venue |
|---|---|---|
2022 | 10.1109/TVLSI.2022.3146064 | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
Keywords | DocType | Volume |
CNTFETs,Layout,Integrated circuit interconnections,FinFETs,Metals,SRAM cells,Electrodes | Journal | 30 |
Issue | ISSN | Citations |
4 | 1063-8210 | 0 |
PageRank | References | Authors |
0.34 | 0 | 12 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Rongmei Chen | 1 | 0 | 1.01 |
| Lin Chen | 2 | 0 | 0.68 |
| Jie Liang | 3 | 0 | 0.68 |
| Yuan-Qing Cheng | 4 | 33 | 8.77 |
| Souhir Elloumi | 5 | 0 | 0.34 |
| J. Lee | 6 | 0 | 1.01 |
| Kangwei Xu | 7 | 0 | 0.68 |
| Vihar P. Georgiev | 8 | 0 | 3.04 |
| Kai Ni | 9 | 6 | 2.93 |
| Peter Debacker | 10 | 32 | 9.04 |
| A. Asenov | 11 | 24 | 15.23 |
| Aida Todri-Sanial | 12 | 46 | 12.58 |