Name
Title | ||
|---|---|---|
A Precision-Scalable Energy-Efficient Bit-Split-and-Combination Vector Systolic Accelerator for NAS-Optimized DNNs on Edge |
Abstract | ||
|---|---|---|
Optimized model and energy-efficient hardware are both required for deep neural networks (DNNs) in edge-computing area. Neural architecture search (NAS) methods are employed for DNN model optimization with resulted multi-precision networks. Previous works have proposed low-precision-combination (LPC) and high-precision-split (HPS) methods for multi-precision networks, which are not energy-efficient for precision-scalable vector implementation. In this paper, a bit-split-and-combination (BSC) based vector systolic accelerator is developed for a precision-scalable energy-efficient convolution on edge. The maximum energy efficiency of the proposed BSC vector processing element (PE) is up to 1.95x higher in 2-bit, 4-bit and 8-bit operations when compared with LPC and HPS PEs. Further with NAS optimized multi-precision CNN networks, the averaged energy efficiency of the proposed vector systolic BSC PE array achieves up to 2.18x higher in 2-bit, 4-bit and 8-bit operations than that of LPC and HPS PE arrays. |
Year | DOI | Venue |
|---|---|---|
2022 | 10.23919/DATE54114.2022.9774679 | PROCEEDINGS OF THE 2022 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE 2022) |
Keywords | DocType | ISSN |
Precision-scalable, bit-split-and-combination, vector systolic, accelerator, CNN, NAS | Conference | 1530-1591 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
9 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Kai Li | 1 | 2 | 4.49 |
| Junzhuo Zhou | 2 | 0 | 0.68 |
| Yuhang Wang | 3 | 17 | 0.92 |
| Junyi Luo | 4 | 0 | 0.34 |
| Zhengke Yang | 5 | 0 | 0.34 |
| Shuxin Yang | 6 | 0 | 0.68 |
| Wei Mao | 7 | 0 | 0.68 |
| Mingqiang Huang | 8 | 0 | 0.34 |
| Yu Yu | 9 | 69 | 19.95 |