Name
Abstract | ||
|---|---|---|
This paper presents a complete 200Gb/s PAM-4 transmitter (TX) in 28nm CMOS technology. The transmitter features a hybrid sub-sampling PLL (SSPLL) with a delta-sigma (ΔΣ) modulator, clock distribution network with flexible timing control, and data path with a hybrid 5-tap Feed-Forward Equalizer (FFE) and T-coil for bandwidth extension. The prototype chip achieves 4.69 pJ/bit efficiency, 54mV eye height, 0.27UI eye width, and 97% RLM under ~6dB channel loss at 50GHz. |
Year | DOI | Venue |
|---|---|---|
2022 | 10.1109/VLSITechnologyandCir46769.2022.9830237 | 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) |
Keywords | DocType | ISSN |
SerDes,Transmitter,Sub-sampling PLL,28nm,CMOS | Conference | 0743-1562 |
ISBN | Citations | PageRank |
978-1-6654-9773-2 | 0 | 0.34 |
References | Authors | |
0 | 11 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Zhongkai Wang | 1 | 7 | 4.79 |
| Minsoo Choi | 2 | 0 | 1.35 |
| Paul Kwon | 3 | 0 | 0.34 |
| Kyoungtae Lee | 4 | 0 | 1.35 |
| Bozhi Yin | 5 | 0 | 0.34 |
| Zhaokai Liu | 6 | 0 | 1.35 |
| Kwanseo Park | 7 | 0 | 0.68 |
| Ayan Biswas | 8 | 2 | 1.43 |
| Jaeduk Han | 9 | 0 | 1.69 |
| Sijun Du | 10 | 0 | 0.68 |
| Elad Alon | 11 | 8 | 1.08 |