Title
Hardware-Efficient Post-Processing Architectures for True Random Number Generators.
Year
DOI
Venue
2019
10.1109/TCSII.2018.2881559
IEEE Transactions on Circuits and Systems II: Express Briefs
DocType
Volume
Issue
Journal
66-II
7
ISSN
Citations 
PageRank 
1549-7747
0
0.34
References 
Authors
0
2
Name
Order
Citations
PageRank
Vladimir Rozic1349.94
Ingrid Verbauwhede2194.83