Title | ||
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A 10.2-ENOB, 150-MS/s Redundant SAR ADC With a Quasi-Monotonic Switching Algorithm for Time-Interleaved Converters |
Abstract | ||
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In this work, a 12-bit, 150-MS/s, 13-steps redundant asynchronous SAR ADC achieving better than 63-dB SNDR and 72-dB SFDR with a 100-MHz Equivalent Resolution Bandwidth (ERBW) is presented. To achieve a high conversion rate without impairing accuracy, the implemented ADC features a custom sub-fF unit capacitance with mismatch calibration in the digital domain, a sub-radix-2 CDAC which introduces redundancy in the conversion, and a new version of the monotonic switching algorithm. The proposed switching procedure halves the common-mode voltage variation at the input of the comparator without requiring any additional voltage reference and without increasing the SAR logic complexity. The presented SAR ADC is fabricated in a 28-nm bulk CMOS process as part of a 6x time-interleaved converter. |
Year | DOI | Venue |
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2022 | 10.1109/NEWCAS52662.2022.9842195 | 2022 20th IEEE Interregional NEWCAS Conference (NEWCAS) |
Keywords | DocType | ISBN |
data converters,SAR,analog to digital,monotonic switching,redundancy,CMOS | Conference | 978-1-6654-0106-7 |
Citations | PageRank | References |
0 | 0.34 | 14 |
Authors | ||
9 |
Name | Order | Citations | PageRank |
---|---|---|---|
Lorenzo Scaletti | 1 | 0 | 0.34 |
Gabriele Be | 2 | 0 | 0.34 |
Angelo Parisi | 3 | 0 | 0.68 |
Luca Bertulessi | 4 | 15 | 4.73 |
Luca Ricci | 5 | 0 | 0.34 |
Mario Mercandelli | 6 | 15 | 4.32 |
Salvatore Levantino | 7 | 351 | 43.23 |
Carlo Samori | 8 | 349 | 39.76 |
Andrea Bonfanti | 9 | 269 | 36.37 |