Author Info
Name
Affiliation
Papers
JUNG-HWAN CHOI
DRAM Design Team, Samsung Electronics, Hwasung, Gyeonggi-do, Korea
1
Collaborators
Citations 
PageRank 
25
0
0.34
Referers 
Referees 
References 
0
0
0
Title
Citations
PageRank
Year
A sub-0.85V, 6.4GBP/S/Pin TX-Interleaved Transceiver with Fast Wake-Up Time Using 2-Step Charging Control and V<inf>OH</inf>Calibration in 20NM DRAM Process00.342018